ESE 587 - Hardware Architectures for Deep Learning

This course focuses on the design and implementation of specialized digital hardware systems for executing deep learning algorithms. The course is divided into three sections. First, students will study field-programmable gate arrays (FPGAs) and related tools. Second, the course will present an overview of modern deep learning algorithms and applications (e.g., visual object recognition, or speech recognition). Third, students will apply this knowledge to complete a significant design project implementing and optimizing a deep learning algorithm on an FPGA.

3 credits

Grading Letter graded (A, A-, B+, etc.)